Energy-Efficient FPGA-Based Parallel Quasi-Stochastic Computing

Energy-Efficient FPGA-Based Parallel Quasi-Stochastic Computing

The high performance of FPGA (Field Programmable Gate Array) in image processing applications is justified by its flexible reconfigurability, its inherent parallel nature and the availability of a large amount of internal memories. Lately, the Stochastic Computing (SC) paradigm has been found to be significantly advantageous in certain application domains including image processing because of i...

Hardware/software codesign for energy-efficient parallel computing

Increasing complexity and integration of multicore processors have enabled unprecedented increases in parallel processing throughput. Unfortunately, the power consumed by these massively parallel integrated systems will likely limit the achieved system performance. Many mechanisms have been proposed to minimize the power consumption of this underlying microprocessor hardware (dynamic-voltage sc...

Towards Energy Efficient Parallel Computing on Consumer Electronic Devices

In the last two decades supercomputers have sustained a remarkable growth in performance that even out-performed the predictions of Moore’s law, primarily due to increased levels of parallelism [19]. As industry and academia try to come up with viable approaches for exascale systems, attention turns to energy efficiency as the primary design consideration. At the same time, energy efficiency ha...

An Efficient LUT Design on FPGA for Memory-Based Multiplication

An efficient Lookup Table (LUT) design for memory-based multiplier is proposed.  This multiplier can be preferred in DSP computation where one of the inputs, which is filter coefficient to the multiplier, is fixed. In this design, all possible product terms of input multiplicand with the fixed coefficient are stored directly in memory. In contrast to an earlier proposition Odd Multiple Storage ...

Ranking stochastic efficient DMUs based on reliability